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Core Power Design of High Performance DSP and Its Voltage Ripple Suppression

机译:高性能DSP的核心电源设计及其电压纹波抑制

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Aiming at the low voltage, high current and low voltage ripple demand of 100G DSP, this paper presents a power design using LTM4650 as the core device. Analyzing the causes and influencing factors of voltage ripple, a solution that used multi-phase parallel and the low ESR capacitor was applied, to suppress the voltage ripple. The results of LTspice simulation software and the actual circuit test, proved that the power design can meet the power requirements of 100G DSP and is able to guarantee the stability of the DSP system.
机译:针对100g DSP的低电压,高电流和低压纹波需求,本文介绍了使用LTM4650作为核心设备的功率设计。分析电压纹波的原因和影响因素,应用了使用多相平行和低ESR电容的解决方案,以抑制电压纹波。 LTSPICE仿真软件和实际电路测试的结果证明,功率设计可以满足100g DSP的电源要求,能够保证DSP系统的稳定性。

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