The Impact of Dynamic Voltage and Frequency Scaling on Multicore DSP Algorithm Design [Exploratory DSP]

摘要

We connect to the two recent IEEE Signal Processing Magazine special issues on digital signal processing (DSP) on multicore processors (November 2009 and March 2010) [1] and address an issue that was not addressed in the articles there, which we believe has important consequences for DSP algorithm design in the future. The basic observation that we start out with is that in DSP algorithm design, there is very often a tradeoff between the computational effort spent (in terms of the number of operations) and the quality/accuracy of the algorithm output.