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Design of QCA circuits using new 1D clocking scheme

机译:采用新型1D时钟机构的QCA电路设计

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This paper considers the proposed clocking scheme for Quantum-dot Cellular Automata (QCA) designs; this scheme utilizes only single or regular (900) cells for circuit design. Based on the analysis of previous schemes, use of single (regular) cells rather than both regular and rotated cells is believed to be an important idea for the QCA designs. According to the previous clocking schemes there are no such schemes exist where only single phase cells are used for circuit design. The main drawback of the previous schemes is that during the fabrication, there is a possibility of “cross-coupling” between the two wires of 900and 450, when arrangement of any cells is misaligned. But there is no misalignment when only single cells are used. The proposed scheme is based on 1D clocking scheme and aim is to provide crossing and information flow with only single or regular cells. Some Combinational circuits such as Adders Half adder, Full adder, 2-Bit adder and 4-Bit adder are designed using proposed 1D clocking scheme with only regular cells (900). It is observed that the circuits designed using this proposed clocking scheme achieves same results in comparisions to the best previous relavant works. Simulation and Verification are carried out by QCADesigner.
机译:本文考虑了Quantum-Dot Cellular Automata(QCA)设计的所提出的时钟方案;该方案仅利用单一或常规(90 0 )电路设计的细胞。基于先前方案的分析,据信使用单(常规)单元而不是常规和旋转的电池的使用是QCA设计的重要思想。根据先前的时钟方案,没有存在这样的方案,其中仅使用单相电池进行电路设计。前一方程的主要缺点是在制造过程中,两根电线之间的可能性有可能“交叉耦合” 0 45 0 ,当任何细胞的布置未对准时。但只有使用单个细胞时没有错位。所提出的方案基于1D时钟方案,目的是提供仅单个或常规细胞的交叉和信息流。一些组合电路,如加法器半加法器,全加法器,2位加法器和4位加法器设计使用所提出的1D时钟机组(仅具有常规单元)(90 0 )。观察到使用该提出的时钟方案设计的电路实现了与以前的先前追加工程的比较相同的结果。仿真和验证由QCadeigner进行。

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