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A BIST Structure for ADC in Mixed-Signal SOC

机译:混合信号SoC中ADC的BIST结构

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摘要

A BIST structure for ADC test in Mixed-Signal SOC to characterize both the dynamic and static parameters was presented. A Sigma-Delta modulation based sinewave generator was built on the chip. The frequency, amplitude and phase of the sinusoidal signal can be adjusted through proper selecting generator parameters which are stored in ADC WBR. The response analyzer was built up from the memory and computational resource in the SOC.
机译:呈现了混合信号SoC中ADC测试的BIST结构,以表征动态和静态参数。基于SIGMA-DELTA调制的SINEWAVE发生器建立在芯片上。可以通过适当的选择发生器参数来调整正弦信号的频率,幅度和相位,该参数存储在ADC WBR中。响应分析器是从SoC中的存储器和计算资源构建的。

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