首页> 外文会议>Surface Mount Technology Association International Conference >1000 DAYS OF TESTING TIN WHISKERING PCB ASSEMBLIES TO DETERMINE THE SUITABILITY OF CONFORMAL COATINGS TO MITIGATE AGAINST SHORTING
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1000 DAYS OF TESTING TIN WHISKERING PCB ASSEMBLIES TO DETERMINE THE SUITABILITY OF CONFORMAL COATINGS TO MITIGATE AGAINST SHORTING

机译:测试1000天的镀锡PCB组件,以确定保形涂层的适用性,以减轻短路

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The spontaneous growth of tin (Sn) whiskers leading to electrical short circuits has been an issue across avionics, space and other high reliability applications. Commercial satellites, nuclear reactors, missile systems and automotive applications have all reported complete or partial failures believed to be associated with tin whisker growth. The UK's National Physical Laboratory has developed a test vehicle incorporating specially plated SOIC components mounted onto PCBs which have a high propensity to develop tin whiskers. These test vehicles have been used to undertake trials on different mitigation techniques designed to inhibit Sn whisker growth. Seventeen international industrial partners have collaborated to determine the relative reliability of a range of different Sn whisker mitigation techniques including twenty conformal coatings. The experimental set up to measure the occurrence of electrical shorts has been built on a bespoke daisy chained SOIC16W, twenty-four of which are mounted on a PCB. Each SOIC is monitored for shorts between adjacent terminations by a resistance measurement. By multiplexing, the experiment has looked at over 3500 components continuously up to 1000 days, with over 48,000 opportunities for failure. The system has captured and stored the resistance state across all components every 15 minutes. The collected data permits the study of the incidence of short circuits, the length of time of each short and the number of intermittent short circuits. We will discuss the rapidity of whisker formation and the formation of intermittent shorts and their duration as the whisker continues to grow.
机译:导致电气短路的锡(SN)晶须的自发生长是航空电子设备,空间和其他高可靠性应用的问题。商业卫星,核反应堆,导弹系统和汽车应用已均报告的完全或部分故障被认为与锡晶须增长有关。英国的国家物理实验室开发了一种掺入安装在PCB上的特殊电镀的SOIC部件的试验车,其具有高倾角晶须的倾向。这些测试车辆已被用于对不同减缓技术进行试验,旨在抑制SN晶须生长。第十七个国际工业伙伴已经合作,以确定一系列不同的SN晶须缓解技术,包括二十个共形涂层的相对可靠性。在定制雏菊链式Soic16W上建立了衡量电气短裤的实验设置,其中二十四个安装在PCB上。通过电阻测量监测每个SOIC以在相邻终端之间的短路进行监测。通过多路复用,实验已经持续超过3500个组件,高达1000天,失败超过48,000个机会。系统已经捕获并每15分钟捕获并存储所有组件的电阻状态。收集的数据允许研究短路的发生率,每个短路的时间长度和间歇短路的数量。我们将讨论晶须形成的速度和间歇性短裤的形成,并且晶须继续增长。

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