Implementation of Real-Time System for Medical Image Processing using Verilog Hardware Description Language

摘要

Image processing algorithms implemented in hardware have emerged as the most viable solution for improving the performance of image processing systems and the introduction of reconfigurable devices and hardware description languages has further accelerated the design of image processing in hardware. To implement the image processing algorithms and to process the large amount of data captured from sources such as medical instruments, intelligent high speed real-time systems have become imperative. This paper is providing an innovative hardware implementation of a real-time configurable system for medical image processing implementation and simulation followed by immediate synthesis using FPGA. The authors present a pipelined architecture of a real-time system for DIP and focuses on medical images enhancement using this system. The hardware modeling is done with the hardware description language Verilog.