首页> 外国专利> Hardware description language files analyzing process for integrated digital electronic system, involves inserting hardware description language (HDL) instruction sequences in HDL files in sequential manner to obtain SCAN chains

Hardware description language files analyzing process for integrated digital electronic system, involves inserting hardware description language (HDL) instruction sequences in HDL files in sequential manner to obtain SCAN chains

机译:集成数字电子系统的硬件描述语言文件分析过程,涉及以顺序方式在HDL文件中插入硬件描述语言(HDL)指令序列以获得SCAN链

摘要

The process involves localizing hardware description language (HDL) instruction sequences in original HDL files, in memory units, during synthesis of an integrated digital electronic system. The HDL instruction sequences are inserted in the HDL files in a sequential manner, during synthesis of the electronic system, in order to obtain SCAN chains that are utilized for connecting the memory units. Independent claims are also included for the following: (A) a device for constructing a hardware description language of an integrated digital electronic system (B) an integrated digital electronic system including hardware description language files.
机译:该过程涉及在集成数字电子系统的合成过程中,在存储单元中的原始HDL文件中本地化硬件描述语言(HDL)指令序列。在电子系统的合成期间,以顺序的方式将HDL指令序列插入到HDL文件中,以便获得用于连接存储单元的SCAN链。还包括以下各项的独立权利要求:(A)用于构建集成数字电子系统的硬件描述语言的设备(B)包括硬件描述语言文件的集成数字电子系统。

著录项

  • 公开/公告号FR2866435A1

    专利类型

  • 公开/公告日2005-08-19

    原文格式PDF

  • 申请/专利权人 INSTITUT NATIONAL POLYTECHNIQUE DE GRENOBLE;

    申请/专利号FR20040009181

  • 发明设计人 AKTOUF CHOUKI;

    申请日2004-08-30

  • 分类号G01R31/3185;G06F11/26;G06F17/50;

  • 国家 FR

  • 入库时间 2022-08-21 21:58:16

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