An in situ Timing Measurement Method for Reliability Diagnosis of Digital Circuits

摘要

In safety critical applications reliability of the digital circuits is of great importance. This work proposes an accurate aging persistent monitoring system and discusses the design and implementation of the required circuitry in a low power 65 nm technology. Precise monitoring of the reliability status of a circuit enables a process, voltage, temperature and aging (PVTA) tolerant design. In the approach presented in this paper, reliability is monitored by measuring the timing of the circuit. For this purpose, the remaining timing slack of the digital circuit is monitored by in-situ timing monitors. The conducted quantitative evaluations regarding the robustness and efficiency of the monitoring approach support the applicability of the proposed methodology.