Design and Implementation of PAL to LVDS Video Adapter Based on FPGA

摘要

In this paper, based on the FPGA and with a PAL decoder chip, LVDS coding chip and large capacity SRAM, the design and implementation of a PAL system for analog signals to the LVDS conversion of the video signal interface board. First of all, convert the analog signal of PAL to RGB565 digital video signal, and transform the interlaced scan into progressive scan. Then, through the frame rate conversion, resolution expansion etc. algorithm method to handle. Finally, to achieve the interlaced scanning, a resolution of 720×576, 25 Hz PAL analog video signal, is converted to a progressive scan, a resolution of 1024×768, 60 Hz LVDS video signal transmission. After the measurement, the resolution and frame rate of the video signal conversion interface board are all meet the design requirements. It has been verified the effectiveness of scheme.