The optimization of grinding parameters for silicon wafers is necessary in order to maximize the reliability of electronic packages. This paper describes the work performed to simulate a back grinding process for silicon wafers using the commercial finite element code ABACUS. The silicon wafer analyzed had a thickness of 120 um and was mounted on a backing tape. The wafer was thinned to a thickness of 96 μm, by simulating the grinding with a diamond particle cutting through successive silicon layers. The modeled residual stresses induced in the wafer were compared with experimental data, and they were shown to agree well. A shear band of intense plastic deformation with a certain orientation angle was generated in the specimen, and the value of this angle was compared with experimental data for similar materials. The numerical model developed can be used to better understand the local conditions in wafers during this back grinding process.
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