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RESET Current Reduction for Phase Change Memory Based on Standard 0.13-μm CMOS Technology

机译:基于标准的0.13-μmCMOS技术复位相变存储器的电流降低

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In order to reduce the RESET current of phase change memory (PCM), which is fabricated using standard 0.13-μm CMOS technology, we have investigated various process factors that might affect the phase transition process, including doping concentration, diameter of bottom electrode contact (BEC) and different chalcogenide materials. Test results suggest that the PCM memory cell, utilizing Si2Sb2Te5 (SST) material as storage element with 80nm BEC, can be operated using a 40ns electrical pulse with current amplitude as small as 0.5mA. This is mainly resulted from the high electrical resistances of the novel chalcogenide both in amorphous and crystalline state, which contribute greatly to the improved efficiency of heating process.
机译:为了降低使用标准0.13-μmCMOS技术制造的相变存储器(PCM)的复位电流,我们研究了可能影响相转移过程的各种过程因子,包括掺杂浓度,底部电极接触的直径( BEC)和不同的硫属化物材料。测试结果表明,使用具有80nm BEC的存储元件的PCM存储器单元可以使用电流幅度小至0.5mA的电流幅度的40ns电脉冲操作。这主要是由于在无定形和结晶状态下的新型硫属化物的高电阻,这对加热过程的提高效率有很大贡献。

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