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STUDENT-CREATED LABORATORY EXERCISES FOR A DIGITAL SYSTEMS DESIGN COURSE USING HDL AND PLDS

机译:使用HDL和PLDS为数字系统设计课程的学生创建的实验室练习

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The concepts presented in an introductory digital systems design lecture are often difficult for students to comprehend fully. In order to aid in this understanding, laboratory exercises are often assigned in order to reinforce the concepts introduced in lecture. These lab exercises also expose students to hardware, software, and hardware description languages used by industry professionals. We have been experimenting with a new paradigm for lab exercise creation, whereby previous students of a course are recruited to create new lab exercises for the course, a method we call "By Students, For Students" that we have tested with several different courses. This paper describes the result of applying this paradigm to a four semester hour introductory digital systems design course typically taken by sophomore electrical engineering and computer engineering majors. The lab exercises involve considerable use of programmable logic and the Verilog hardware description language (HDL). Interestingly, the student-created lab exercises tended to be more challenging than the previous set of faculty-created lab exercises.
机译:在介绍性数字系统设计讲座中呈现的概念通常很难完全理解。为了帮助这种理解,经常分配实验室练习,以加强讲座中介绍的概念。这些实验室练习还将学生公开到行业专业人士使用的硬件,软件和硬件描述语言。我们一直在尝试一个新的范例进行实验室锻炼创造,从而招募了一个课程的学生,为课程创建新的实验室练习,我们称之为“学生”的方法,我们用几个不同的课程测试了“学生”。本文介绍了将此范例应用于四个学期的一小时介绍性数字系统设计课程,通常由二年级学电气工程和计算机工程专业进行。实验室练习涉及可编程逻辑和Verilog硬件描述语言(HDL)的相当实地使用。有趣的是,学生创建的实验室练习往往比上一组教师创造的实验室练习更具挑战性。

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