CMOS Equivalent Model of Ferroelectric RAM

摘要

The current research work in the paper is the representation of FRAM (Ferroelectric Random Access Memory) as an equivalent Model of Ferroelectric memory cell in Spice Tool. This Equivalent CMOS based model is designed to work at par with the behaviour working of the FRAM. The crux of the design of ferroelectric capacitor in the Ferroelectric Random Access Memory lies in the Hysteris loop. Further an analytical comparison of CMOS Model has been done with the existing FRAM Models[l] which are generally Current-based. Also, other models and designs that are based on Hystersis loop have been studied during the research. The designed CMOS Equivalent Model exhibits both the Current and transient Behaviour of the Actual FRAM cell with equally good performance. In Actual Spice tools, FRAM Capacitor is not used, henceforth leads to increase in the complexity of Design and Modeling of FRAM memory in Equivalent CMOS Model. Thus the current research throws light on the detailed and thorough modelling and design of CMOS behavioral Model and CMOS Equivalent Working Model.