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Design of Dual-Channel High-speed Data Acquisition Card Based on USB 3.0 and FPGA

机译:基于USB 3.0和FPGA的双通道高速数据采集卡设计

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A high-speed data acquisition card using USB 3.0 interface has been designed in order to solve the problem that traditional data acquisition card could not take both data transmission bandwidth and easy connection with PC into account. The data acquisition card controlled the dual-channel 12-bit 20Msps ADC for asynchronous parallel sampling using FPGA as core control module, which made the sampling rate up to 40Msps. The sampled data which was processed by FPGA transferred synchronous from FIFO interface to PC via USB controller. The basic structure of hardware and the basic design method for software and firmware were given in this paper, in which how to use FPGA to realize FIFO was elaborated in detail. The timing simulation of using asynchronous parallel A/D conversion technology and using ADC device of 40Msps sampling rate for FIFO internal data transmission were simulated respectively, thus verified the reliability of asynchronous parallel A/D conversion.
机译:设计了使用USB 3.0接口的高速数据采集卡,以解决传统数据采集卡无法遵循数据传输带宽和与PC连接的问题的问题。数据采集​​卡控制双通道12位20msPS ADC,使用FPGA作为核心控制模块的异步并行采样,这使得采样率高达40msps。由FPGA处理的采样数据通过USB控制器将与FIFO接口同步到PC。本文给出了硬件的基本结构和软件和固件的基本设计方法,其中如何详细阐述了如何使用FPGA实现FIFO。分别模拟了使用异步并行A / D转换技术和使用40msps内部数据传输的40msPS采样率的ADC设备的定时仿真,从而验证了异步并行A / D转换的可靠性。

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