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A Digital Calibration Design for 10-bit Folding and Interpolating ADC

机译:10位折叠和插值ADC的数字校准设计

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A new digital pre-calibration scheme for 10-bit folding and interpolating ADC is presented in this paper. A way of bidirectional searching for zero-crossing points is introduced; the scheme could calibrate the drift of zero-crossing rising from the offset of all stages in quantization path. The calibration stage consists of 6-bit current scaling DACs embedded in 36 differential amplifiers, and a digital controller, realizing the functions of calibration circulation, "interruption" processing, and "broken point" recovery. When the presented calibrator is used in folding and interpolating ADC, simulation results show that the ADC can achieves 10-bit 250MS/s in SMIC 0.18μm process.
机译:本文提出了一种用于10位折叠和内插ADC的新型数字预校准方案。介绍了一种双向搜索零交叉点的方式;该方案可以校准从量化路径中所有阶段的偏移量的零交叉升高的漂移。校准阶段由嵌入在36个差分放大器中的6位电流缩放DAC和数字控制器,实现校准循环的功能,“中断”处理和“断点”恢复。当所提出的校准器用于折叠和内插ADC时,仿真结果表明,ADC可以在SMIC0.18μm过程中实现10位250ms / s。

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