Performance study of Ballistic and Quasi-Ballistic on Double-Gate MOSFETs 6T SRAM cell

摘要

In this paper, the impact of ballistic/quasi-ballistic carrier transport on the switch of a CMOS inverter and on the noise margin of a 6T SRAM cell, both based on Double-Gate MOSFETs (DGMOS), is analysed using mixed-mode simulations. To simulate ballistic and quasi- ballistic transport, we introduce the pioneering approach of quasi-ballistic mobility proposed by Rhew et al into a TCAD simulator. Finally, we demonstrate the direct relation between the nature of transport in the channel and the 6T SRAM cell static performances.