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Investigation of optimized high-density flip-chip interconnect design including micro Au bumps and underfill for ultrabroadband (DC-40GHz) applications

机译:优化的高密度倒装芯片互连设计,包括微AU凸块和超高压带(DC-40GHZ)应用的填充物

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In this study, the high-speed signal transmission characteristics of high density flip-chip interconnect incorporating micro Au bumps were investigated. A TEG (test element group) device and substrate was designed and fabricated to measure the properties of the high density interconnect structure. The test chip and substrate had Cu wires patterned to create a controlled impedance CPW (coplanar waveguide) transmission line in order to test the high-speed signal transmission properties. The characteristic impedance and S-parameters (S21,S11) of the flip-chip bonded test chip and substrate was measured. 50 Ω CPWs were successfully fabricated both with and without underfill. The use of underfill was found not to have a significant effect on the transmission lines S-parameters. In this work we have presented a method for designing specific impedance and high frequency properties on Si substrates in the presence of underfill and flip-chip bonded circuits.
机译:在该研究中,研究了结合微AU凸块的高密度倒装芯片互连的高速信号传输特性。 设计和制造TEG(测试元件组)器件和基板以测量高密度互连结构的性质。 测试芯片和基板具有CU线,图案化以创建受控阻抗CPW(共面波导)传输线,以便测试高速信号传输特性。 测量倒装芯片粘合测试芯片和衬底的特征阻抗和S参数(S 21 ,S 11 )。 50Ω CPWS在没有底部填充的情况下成功制作。 发现使用底部填充物不会对传输线S参数产生显着影响。 在这项工作中,我们介绍了在底部填充和倒装芯片键合电路的情况下在Si基板上设计特定阻抗和高频性能的方法。

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