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Design of a reconfigurable computing platform

机译:可重构计算平台的设计

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This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. The RCP is built to allow users with little or no knowledge of hardware design to program high performance computing applications that utilizes FPGA as the coprocessor. The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. A customized platform support package (PSP) was developed within the Impulse CoDeveloper environment to enable the Impulse tools to automatically generate the HDL files and C source codes with supported hardware and software interfaces that is targeted for the RCP. The PSP also automates the synthesis and implementation process integration to generate the bitstream file from the Xilinx ISE foundation tool. Finally, the RCP is made accessible within a LAN with the FUSE TCP/IP Server tool.
机译:本文介绍了基于英特尔Xeon通用处理器和Nallatech Bennuey-PCI-4E现场可编程门阵列(FPGA)主板的可重新配置计算平台(RCP)的设计。建立RCP,以允许用户对硬件设计很少或没有知识来编程利用FPGA作为协处理器的高性能计算应用程序。 RCP利用脉冲代码开发器,它是一种电子系统级(ESL)设计工具,可以将C中的顺序应用/算法编译为合成的HDL。在脉冲Codeveloper环境中开发了一种自定义的平台支持包(PSP),以使脉冲工具能够自动生成HDL文件和C源代码,其中包含针对RCP的支持的硬件和软件接口。 PSP还自动化合成和实现流程集成以从Xilinx ISE Foundation工具生成比特流文件。最后,使用熔丝TCP / IP服务器工具可以在LAN内访问RCP。

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