Process variation impact on FPGA configuration memory

摘要

The impact of process local variation on FPGA configuration memory is studied in this paper. Memory cell stability is examined by simulations and experiments on 65nm and 45nm processes. A statistical simulation method, which correlates closely with product silicon, has been developed. The results show that the trend of process local variation and memory density scaling adversely impact FPGA configuration memory stability. It is found that the cell stability is greatly affected by cell layout.