Cross Layer Hardware Demonstrator for Wireless Communication based on a FPGA

摘要

This paper describes a hardware demonstrator for wireless communication applications which is integrated into a single FPGA. The physical layer (PHY) is based on the Orthogonal Frequency Division Multiplexing (OFDM) transmission technique and is implemented with dedicated logic. The data link layer is defined by program code which is executed on the LEON3, a RISC processor module which is based on the SPARC architecture.