A CMOS High IIP2 Mixer for Multi-Standard Receivers

摘要

An IIP2 enhancement technique for CMOS down converter mixers is introduced in this paper. The technique is based on canceling second order intermodulation components generated in input pseudo differential transconductor, by injecting a nonlinear current to the mixer. This current is controlled by a feedback loop which provides enough bandwidth for high channel bandwidth applications like UMTS as well as GSM, therefore this cancellation technique can be employed in multi-standard mixers. A CMOS mixer demonstrating the performance for UMTS standard is designed in a 65nm technology. The simulation results show that the differential and common mode IIP2 of the mixer are improved about 15dB and 27dB respectively, while cancellation circuit consumes less than 2mA.