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POTENTIAL OF LARGE AREA MOLD EMBEDDED PACKAGES WITH PCB BASED REDISTRIBUTION

机译:大面积模具嵌入式包装套件基于PCB的再分配

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The constant drive to further miniaturization and heterogeneous system integration leads to a need for new packaging technologies which also allow large area processing and 3D integration with potential for low cost applications. Large area mold embedding technologies and embedding of active components into printed circuit boards (Chip-in-Polymer) are two major packaging trends in this area. This paper describes the potential of advanced large area encapsulation processes for multi chip embedding in combination with large area and low cost redistribution technology derived from printed circuit board manufacturing. PCB based redistribution offers the potential of real large area redistribution up to 610 × 457 mm~2 and the integration of through mold vias (TMVs) as both are standard features in PCB manufacturing. For the proposed combination of mold embedding and PCB based redistribution two process variations are introduced. The first approach starts with reconfigured wafer/panel assembly, encapsulation and PCB based redistribution with μvias for die interconnection. For the second approach dies are assembled face down on a Cu foil with an adhesive followed by an overmolding/ lamination step. The die interconnect is formed by a photolithography/etching step to open the Cu film at the locations of the die pads and the pads are connected by metallization afterwards. Process steps as assembly, encapsulation and redistribution on panel size are discussed in detail showing today's possibilities. Finally, packages developed are introduced demonstrating the feasibility of the proposed technology. In summary this paper describes the potential of large area mold embedding technology in combination with PCB based redistribution processes towards a 3D SiP stack. The technology described offers a cost effective packaging solution for e.g. future sensor/ASIC systems or processor/memory stacks providing miniaturization and sourcing advantages known from PoP assembly.
机译:恒定驱动到进一步的小型化和异构系统集成导致新的包装技术,这也允许大面积处理和3D集成与低成本应用的潜力。大面积模具嵌入技术和嵌入有源部件进入印刷电路板(芯片 - 聚合物)是该领域的两个主要包装趋势。本文介绍了多芯片嵌入过程的高级大面积封装工艺的潜力与来自印刷电路板制造的大面积和低成本再分配技术组合。基于PCB的重新分配提供了高达610×457mm〜2的实际大面积再分布的潜力,并且通过模具通孔(TMV)的整合,因为两者都是PCB制造中的标准功能。对于拟议的模具嵌入和基于PCB的再分配的组合,引入了两个过程变化。第一种方法从重新配置的晶片/面板组件,封装和PCB基于μVIAS的重新分布开始,用于模具互连。对于第二种方法,模具在具有粘合剂的Cu箔上组装在粘合剂上,然后进行包覆层/层压步骤。模具互连通过光刻/蚀刻步骤形成,以在模具焊盘的位置处打开Cu膜,并且之后通过金属化连接焊盘。详细讨论了面板大小的组装,封装和再分配的过程步骤,显示了今天的可能性。最后,介绍了开发的包装,展示了所提出的技术的可行性。总之,本文介绍了大面积模具嵌入技术与基于PCB的重新分布过程朝向3D SIP堆栈的潜力。所描述的技术提供了一种具有成本效益的包装解决方案。未来的传感器/ ASIC系统或处理器/存储器堆栈提供流行组装中已知的小型化和采购优点。

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