Because of their very high thermal conductivity, low melting point, and high shear compliance, indium-based materials are excellent candidates for thermal interface material (TIM) applications for packaging thermally sensitive next-generation devices. However, currently used indium-based solders suffer from 2 serious shortcomings: (i) high cost due to high indium content, and (ii) very low compressive strength and creep resistance which may lead to structural instability following heat-sink attachment. In order to circumvent these problems, and also introduce a built-in melting point hierarchy following initial reflow, a radically different approach for producing microelectronic solder TIMs based on liquid phase sintering (LPS) is being developed. In this paper, we report on the processing and characterization of LPS Sn-In solders, the micro structure of which consists predominantly of particles of the high melting phase (HMP) Sn and a smaller amount of intergranular low melting phase (LMP) In. By optimizing the In content, highly compliant LPS solders with flow stresses close to that of pure In were obtained. The electrical and thermal conductivity of the LPS solder was found to be about half that of pure In. It is demonstrated that metallurgically good joints can be produced between this new solder and Cu substrates during a single step which combined LPS with joining. The contact thermal resistance of the internal grain boundaries was estimated, and it is inferred that because of the numerous internal boundaries, the solder/substrate interfaces have relatively small effect on the joint resistance. Based on the estimated boundary resistance, a previously developed model was utilized to predict the thermal conductivity of the LPS solder as a function of HMP volume fraction and particle size.
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