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ADVANCED SIR TESTING FOR TRAPPED SOLDER PASTE FLUX RESIDUE

机译:先进的SIR测试试验焊膏焊剂残留物

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One of the biggest challenges to producing electrochemically reliable electronics is the trapping of flux residues under Bottom Termination Components (BTC), such as QFN's, MLF's and some LGA's. BTC use has become extensive in electronic assembly due to low cost and small size with improved thermal and electrical performance, making these components very attractive for many applications. Electrochemical reliability of the BTC assemblies has been addressed in many publications for both cleaned and unclean electronic assemblies in the recent past. Many no-clean solder pastes that are very reliable in standard SMT reflow assembly processes with non-BTC configurations exhibit electrochemical failures under BTC"s, especially with a larger ground pads/heat sink design. Solder paste flux activators and solvents are unable to evaporate during reflow; they remain behind in the flux residue and allow electrochemical failures, such as low Surface Insulation Resistance (SIR) and Electro Chemical Migration (ECM) shorting. A second reliability challenge is the ever decreasing spacing between components, leads and pitch reduction overall. Mobile and communication devices present the worst combination of these reliability challenges because of their high board density. There is a need to develop solder pastes that not only allow printing small stencil apertures but also provide better electrochemical reliability when flux residue is trapped under low-standoff components with closely spaced IO's. To meet this need, an SIR/ECM test methodology has been developed using 200μm spacing 1 mm trace comb patterns covered with thin, light glass slips that float on top of the solder paste during reflow that prevent the volatilization of most of the paste activators and solvents and keep them within the flux residue. These test vehicles are then exposed to 85°C and 85% RH at 10V. Most commercially available solder pastes showed some degree of ECM within hours of exposure. The development of this test method has allowed better differentiation between the reliability of various solder paste and facilitated the development of pastes that are much more reliable reliability under BTC's and take a significantly longer time to fail.
机译:产生电化学可靠电子设备的最大挑战之一是介于底部终端组分(BTC)下的助熔剂残留物,例如QFN,MLF和一些LGA。由于具有低成本和电气性能的低成本和小尺寸,BTC使用在电子组件中变得广泛,使这些组件非常有吸引力对许多应用。 BTC组件的电化学可靠性已经在最近的许多清洁和不洁净的电子组件中解决了许多出版物。许多无清洁焊膏在标准SMT回流装配过程中非常可靠,具有非BTC配置在BTC下表现出电化学故障,特别是具有较大的地板/散热器设计。焊膏助熔剂活化剂和溶剂无法蒸发在回流期间;它们留在助焊剂残留物中并允许电化学故障,例如低表面绝缘电阻(SIR)和电气化学迁移(ECM)缩短。第二个可靠性挑战是组件,引线和间距整体之间的间距下降。移动和通信设备由于其高板密度,呈现这些可靠性挑战的最糟糕的组合。需要开发焊膏,不仅允许打印小型模版孔,而且在低温下捕获焊剂残留时还提供更好的电化学可靠性。具有紧密间隔的IO的宿舍组件。为了满足这种需求,SIR / ECM测试方法已经开发使用200μm间距1 mm迹线梳状图案,覆盖着薄的轻玻璃滑块,在回流过程中漂浮在焊膏顶部,以防止大部分浆料活化剂和溶剂的挥发并将它们保持在助熔剂残留物中。然后将这些试验载体在10V下暴露于85℃和85%RH。大多数商业上可获得的焊膏在曝光时间内显示出一定程度的ECM。这种测试方法的发展允许在各种焊膏的可靠性之间允许更好的差异化,并促进了在BTC下更可靠的浆料的开发,并取得了明显更长的时间来失效。

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