Determine OPC Target Specifications Electrically instead of Geometrically

摘要

Deep sub-wavelength optical lithography significantly distorts the shape of transistor channel, particularly causing gate corner rounding at the beginning of active area (i.e. active margin), due to proximity effect. Optical Proximity Correction (OPC) aims at compensating for lithography induced geometry distortion, but still could not completely fix geometry distortion especially corner rounding. The OPC target specification of corner rounding at active margin, i.e. how many nanometer of corner rounding is allowed, is usually determined subjectively based geometric specs without considering the actual electrical performance impact on transistor. Instead of determining the OPC corner rounding target specs geometrically, we proposed a methodology to determine corner rounding specs electrically, particularly in this case, based on the impact on transistor drain current in saturation mode. We first assessed the impact of corner rounding on transistor drain current using a first order analytical model, then compared it with the HSPICE simulation result using a non-rectangular transistor channel whose shape was obtained through post-OPC lithography simulation. Reasonably good agreement was observed between the first order model approach and the HSPICE simulation based approach, which is more rigorous intrinsically. This methodology can also be used in the determination of lithography process specification such as misalignment between active and poly gate layers.