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Co-optimization of Performance and Power in a Superscalar Processor Design

机译:超大处理器设计中性能和功率的共同优化

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As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. The co-optimization requires exploration into a huge design space containing both performance and power factors, whose size is over costly for extensive traditional simulations. This paper describes a unified model covering both performance and power. The model consists of workload parameters, architectural parameters plus corresponding power parameters with a good degree of accuracy compared with physical processors and simulators. We apply the model to the problem of co-optimizing the power and performance. Concrete insights into the tradeoffs of designs for performance and power are obtained in the process of co-optimization.
机译:随着工艺技术缩小,电源墙开始妨碍处理器性能的改进。性能优化必须在功率约束下进行。共同优化需要探索包含两种性能和功率因素的巨大设计空间,其大小超过广泛的传统模拟。本文介绍了覆盖性能和功率的统一模型。该模型由工作负载参数,架构参数以及与物理处理器和模拟器相比具有良好准确度的相应功率参数。我们将模型应用于共同优化电源和性能的问题。在共同优化过程中获得了对性能和力量设计权衡的具体洞察。

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