Design and Implementation of Ultra-Small-Size and Ultra-Low-Power Digital Systems on GaAs-based Hexagonal Nanowire Networks Utilizing a Hexagonal BDD Quantum Circuit Approach

摘要

This paper discusses feasibility of design and future implementation of ultra-small-sizc and ultra-low-power digital logic systems by a hexagonal BDD (binary-decision diagram) quantum circuit approach. The discussion is based on various circuits formed on GaAs-based hexagonal nanowire networks controlled by nanometer scale Schottky wrap gates (WPGs). Starting from basic node devices and elementary logic function blocks, fabrication technology of hexagonal BDD quantum circuits up to 8-bit adders with node densities over 45 million nodes/cm2 has been successfully developed. Their correct operations at low temperafures and room temperature have been confirmed by experiments and simulation. Various circuit components in logic processors, including arithmetic logic unit (ALU), controller and decoders have been successfully designed as hexagonal BDD layouts without nanowire crossover. For sequential circuits, WPG-controlled nanowire FETs on hexagonal networks have been investigated, and registers and counters have been implemented using these nanowire FETs showing correct operation. Hexagonal BDD-based static 2-bit nano-processor unit (NPU) has been successfully designed completely on hexagonal nanowire network. Ultra high-density GaAs hexagonal nanowire networks with much smaller wire sizes than those of etched nanowire networks have been successfully formed by selective MBE growth, showing great promise for room temperature operation iu quantum regime as well as reduction of system area and power consumption.