Analysis and simulation of noise in correlated double sampling imager circuits

摘要

Noise is an important factor in determining the sensitivity of CMOS imagers at low light levels. Both device or transistor thermal noise and 1/f noise are contributing factors, correlated double sampling reduces the effect of both thermal noise and 1/f noise but is less effective in reducing 1/f noise as sampling time increases. Techniques to simulate noise in sampling circuits have only recently become available and are compared here to the older analytical techniques.