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0.18 μm CMOS Fully Differential CTIA for a 32x16 ROIC for 3D Ladar Imaging Systems

机译:用于32x16 ROIC的3.18μmCMOS全差分CTIA用于3D LDAR成像系统

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We describe a 2-D fully differential Readout Integrated Circuit (ROIC) designed to convert the photocurrents from an array of differential metal-semiconductor-metal (MSM) detectors into voltage signals suitable for digitization and post processing. The 2-D MSM array and CMOS ROIC are designed to function as a front-end module for an amplitude modulated/continuous time AM/CW 3-D Ladar imager under development at the Army Research Laboratory. One important aspect of our ROIC design is scalability. Within reasonable power consumption and photodetector size constraints, the ROIC architecture presented here scales up linearly without compromising complexity. The other key feature of our ROIC design is the mitigation of local oscillator coupling. In our ladar imaging application, the signal demodulation process that takes place in the MSM detectors introduces parasitic radio frequency (rf) currents that can be 4 to 5 orders of magnitude greater than the signal of interest. We present a fully-differential photodetector architecture and a circuit level solution to reduce the parasitic effect. As a proof of principle we have fabricated a 0.18 μm CMOS 32x16 fully differential ROIC with an array of 32 correlated double sampling (cds) capacitive transimpedance amplifiers (CTIAs), and a custom printed circuit board equipped to verify the test chip functionality. In this paper we discuss the fully differential IC design architecture and implementation and present the future testing strategy.
机译:我们描述了一个2-D全差分读出集成电路(ROIC),该集成电路(ROIC)旨在将光电流从差分金属 - 半导体 - 金属(MSM)检测器阵列转换为适合于数字化和后处理的电压信号。 2-D MSM阵列和CMOS ROIC设计成用作振幅调制/连续时间AM / CW 3-D拉尔成像器的前端模块,在军队研究实验室开发。我们的ROIC设计的一个重要方面是可扩展性。在合理的功耗和光电探测器尺寸约束中,呈现的ROIC架构在此呈现线性缩放而不会影响复杂性。我们的ROIC设计的另一个关键特征是对本地振荡器耦合的缓解。在我们的LADAR成像应用中,在MSM探测器中发生的信号解调过程引入了寄生射频(RF)电流,其比感兴趣的信号大的程度为4比5的数量级。我们介绍了一个完全差分的光电检测器架构和电路电平解决方案,以减少寄生效应。作为原理的证据,我们制造了0.18μmCMOS32X16全差分ROIC,阵列32个相关的双采样(CDS)电容式跨阻抗放大器(CTIAS),以及配备的定制印刷电路板,以验证测试芯片功能。在本文中,我们讨论了完全差分IC设计架构和实施,并呈现了未来的测试策略。

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