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FPGA Based Programmable Synchronous Signal Generation For Multifunction Radars

机译:基于FPGA的多功能雷达的可编程同步信号产生

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The various subsystems of Radar are to be synchronized with respect to radar base clock to define their proper sequence of operation. Type of the synchronous signal generated depends on the subsystem. The signals depend on radar waveform characteristics such as pulse width, pulse repetition frequency, modulation code, number of pulses etc and also on other factors like receive window, zero Km correction etc. These synchronization signals are normally generated by the radar controller (RC). Traditional radar generates one type of waveform for detection of a particular target. Generation of synchronization signals was easily implemented using discrete hardware. But in the modern multifunction radars, to perform multiple functions simultaneously for surveillance and tracking various types of targets, the waveforms are generated dynamically change. For such systems the logic to generate the synchronization signals cannot be frozen. A high-speed programmable hardware is required to cope up with such requirement. In this paper solution to this is provided with a FPGA based design, which can be easily interfaced with microprocessor or Power PC architecture. This design deals with the generation of the basic synchronization signal, which forms the reference, and derivation of all other synchronization signals for various subsystems from this reference signal and the derived clock. This design results in a programmable synchronous signal generator, which is generic in nature with a high degree of flexibility. The paper also emphasizes on the digital implementation aspects, which prove to be superior to the conventional discrete hardware methods.
机译:雷达的各个子系统应相对于雷达基础时钟同步以定义其适当的操作顺序。生成的同步信号的类型取决于子系统。信号依赖于雷达波形特性,例如脉冲宽度,脉冲重复频率,调制码,脉冲数等以及接收窗口等其他因素,零km校正等。这些同步信号通常由雷达控制器(RC)产生。传统雷达产生一种用于检测特定目标的波形。使用离散硬件容易地实现同步信号的产生。但在现代多功能雷达中,为了监视和跟踪各种类型的目标的同时执行多种功能,产生动态变化的波形。对于这种系统,无法冻结生成同步信号的逻辑。需要高速可编程硬件来应对此类要求。在本文中,本发明的解决方案具有基于FPGA的设计,可以轻松地与微处理器或电源PC架构接口。该设计涉及生成基本同步信号,它形成来自该参考信号和派生时钟的各种子系统的所有其他同步信号的参考。该设计导致可编程同步信号发生器,其具有高度灵活性的自然界。本文还强调了数字实现方面,这证明是优于传统的离散硬件方法。

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