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An accurate design of fully integrated 2.4GHz CMOS cascode LNA

机译:完全集成的2.4GHz CMOS Cascode LNA精确设计

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This paper presents a full integrated 2.4GHz inductively degenerated cascode low noise amplifier (LNA) realized in a standard TSMC 0.25-/spl mu/m CMOS process. The source degenerated inductor has been design after the electromagnetic (EM) analysis using the calibrated substrate conditions. The measured performance of the proposed LNA shows the noise figure (NF) of 2.87 dB, the power gain of 13.29 dB, and the reverse isolation of -30.8 dB. High linearity design with the output 1 dB gain compression point (PldB) of 0 dBm, input third-order intercept point (IIP3) of 2.2 dBm, and the power consumption is only 11 mW while dissipating 5.5 mA from a 2 V supply. The overall measured results of the implemented LNA show good agreement with simulated results.
机译:本文介绍了标准TSMC 0.25- / SPL MU / M CMOS工艺中实现的全集成2.4GHz电感退化的CALCODE低噪声放大器(LNA)。源退化电感器在使用校准的基材条件下的电磁(EM)分析之后设计。所提出的LNA的测量性能显示了2.87 dB的噪声系数(NF),功率增益为13.29dB,以及-30.8 dB的反向隔离。高线性设计与输出1 dB增益压缩点(PLDB)为0 dBm,输入三阶截取点(IIP3)为2.2 dBm,功耗仅为11 MW,同时从2 V电源耗散5.5 mA。实施的LNA的整体测量结果显示出与模拟结果的良好一致性。

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