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10-40 GHz design in SiGe-BiCMOS and Si-CMOS - linking technology and circuits to maximize performance

机译:SiGe-BICMOS和SI-CMOS的10-40 GHz设计 - 连接技术和电路,以最大限度地提高性能

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This paper reviews the relevance of the widely used device metrics f/sub T/, f/sub max/ as well as the recently introduced device metrics f/sub A/ and f/sub cross/ for broadband circuit design. Usually, IC processes are benchmarked on the basis of their f/sub T/ and f/sub max/. For most circuit applications however, there is only an indirect relation between f/sub T/, f/sub max/ and circuit bandwidths. Since the differential pair amplifier is a key building block in broadband circuits, the metric f/sub A/ provides a nearly direct relation to broadband circuit performance. This is demonstrated via the maximum operating frequency of a current-mode logic frequency divider, processed in 3 generations of a BiCMOS process. Metric f/sub cross/ is valuable for the design of circuits employing a cross-coupled differential pair as active negative resistance, such as in LC-VCOs. The metrics can be expressed in terms of transistor parameters (e.g., R/sub b/, C/sub bc/...), allowing to derive a link between circuit performance and technology. Based on our experience, we evaluate IC processes on the basis of f/sub T/, f/sub A/ and f/sub cross/ rather than f/sub T/ and f/sub max/.
机译:本文审查了广泛使用的设备度量F / SUM T /,F / SUM MAX /以及最近引入的设备度量F / SUB A / AN / SUB交叉/用于宽带电路设计的相关性。通常,IC进程基于其F / Sub T / Sub Max /基准测试。然而,对于大多数电路应用,F / SUM T /,F / SUB MAX / SUM MAX和电路带宽之间仅间接关系。由于差分对放大器是宽带电路中的密钥构建块,因此度量F / SUB A /提供与宽带电路性能的几乎直接关系。这通过电流模式逻辑分频器的最大工作频率来证明,在3代BICMOS过程中处理。公制F / Sub交叉/对于采用交叉耦合差分对作为主动负电阻的电路设计,例如LC-VCOS的电路设计。测量标准可以以晶体管参数(例如,R / SUB B /,C / SUB / ...)表示,允许导出电路性能和技术之间的链路。基于我们的经验,我们根据F / SUM T /,F / SUB A / SU / SUS交叉/而不是F / SUB T / SUB MAX / SIC计算IC过程。

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