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A Studying on Implementation of NIDS Pattern Matching Based on FPGA

机译:基于FPGA的NIDS模式匹配实现研究

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Intrusion detection for network security is an application area demanding high throughput. The pattern matching in intrusion detection requires extremely high performance to process string matching. Most of pattern matching using software has many time complexities and cannot reach the requirements of high throughput. The pattern matching using hardware considerably improves the speed of matching and has several other advantages. This paper describes a FPGA-based pattern matching architecture, using hashing method called XOR Hashing. The proposed method updates new patterns without reconfiguration and processes the collision and has high matching performance. The proposed system implements the pattern matching by using Snort rule-set, an open source Network Intrusion Detection and has simulation processing on PC. Compared with existing hardware method, the results explained that our method has relatively high performance for the pattern matching and can else process the pattern matching with high performance on low-cost FPGA device.
机译:网络安全的入侵检测是一个要求高吞吐量的应用面积。在入侵检测中匹配的模式需要极高的性能来处理字符串匹配。使用软件的大多数模式匹配具有许多时间复杂性,无法达到高吞吐量的要求。使用硬件的模式匹配显着提高了匹配的速度并具有其他几个优点。本文介绍了一种基于FPGA的模式匹配架构,使用称为XOR散列的散列方法。该方法在没有重新配置的情况下更新新模式并处理碰撞并具有高匹配性能。所提出的系统通过使用Snort规则集,开源网络入侵检测并在PC上具有仿真处理来实现模式匹配。与现有的硬件方法相比,结果说明了我们的方法对模式匹配具有相对高的性能,并且可以在低成本FPGA设备上具有高性能的模式匹配。

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