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FPGA Design for Constrained Energy Minimization

机译:FPGA设计限制能量最小化

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The Constrained Energy Minimization (CEM) has been widely used for hyperspectral detection and classification. The feasibility of implementing the CEM as a real-time processing algorithm in systolic arrays has been also demonstrated. The main challenge of realizing the CEM in hardware architecture is the computation of the inverse of the data correlation matrix performed in the CEM, which requires a complete set of data samples. In order to cope with this problem, the data correlation matrix must be calculated in a causal manner which only needs data samples up to the sample at the time it is processed. This paper presents a Field Programmable Gate Arrays (FPGA) design of such a causal CEM. The main feature of the proposed FPGA design is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm that can convert a Givens rotation of a vector to a set of shift-add operations. As a result, the CORDIC algorithm can be easily implemented in hardware architecture, therefore in FPGA. Since the computation of the inverse of the data correlation matrix involves a series of Givens rotations, the utility of the CORDIC algorithm allows the causal CEM to perform real-time processing in FPGA. In this paper, an FPGA implementation of the causal CEM will be studied and its detailed architecture will be also described.
机译:受约束的能量最小化(CEM)已广泛用于高光谱检测和分类。还证明了在收缩阵列中实现CEM作为实时处理算法的可行性。实现硬件架构中CEM的主要挑战是计算CEM中执行的数据相关矩阵的逆,这需要一组完整的数据样本。为了应对这个问题,必须以因果方式计算数据相关矩阵,该因果方式仅需要在处理时对样本的数据采样。本文介绍了这种因果CEM的现场可编程门阵列(FPGA)设计。所提出的FPGA设计的主要特点是使用坐标旋转数字计算机(CORDIC)算法可以将向量的GIVENS旋转转换为一组移位添加操作。结果,CORDIC算法可以在硬件架构中容易地实现,因此在FPGA中可以实现。由于数据相关矩阵的逆的计算涉及一系列GIVENS旋转,因此CORDIC算法的实用程序允许因果CEM在FPGA中执行实时处理。在本文中,将研究其因果CEM的FPGA实现,并且还将描述其详细架构。

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