application specific integrated circuits; circuit optimisation; digital signal processing chips; low-power electronics; nanoelectronics; timing; integrated circuit design; power dissipation; design constraint; performance constraint; nanometer technologies; standard cell ASIC; timing constraints; multiple supply voltages; multiple threshold voltages; power optimization; power efficiency; level shifters; fine-grained generic voltage islands; multiple device thresholds; optimization algorithm; fixed-function real-time distributed DSP;
机译:柴油动力汽车排放限制,燃料消耗最小化最小化
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机译:通用系统中在严格的性能约束下将OS级功耗最小化
机译:在功率约束下的性能协调软件和硬件
机译:限制肌肉表现:在功率输出和抗疲劳性之间进行权衡。
机译:通用系统中严格的性能约束下的Os级功耗最小化