Improved Charge Pump for Reduced clock feed through and Charge Sharing Suppression

摘要

The design and simulation of an improved charge pump structure has been proposed in this paper to reduce the phase noise of phase locked loop (PLL). The non-ideal effects of the charge pump such as the clock feed through, current mismatch and charge sharing are analyzed. The improved and conventional charge pumps arc simulated and compared. The charge pump has been designed using 0.35um TSMC Technology and The simulation results is obtained by SPECTRES software.