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Novel Localized-SOI MOSFET's Combining the Advantages of SOI and Bulk Substrates for Highly-Scaled Devices

机译:新颖的本地化-SOI MOSFET结合了SOI和散装基板的优点,用于高度缩放的设备

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In this paper two kinds of novel localized-SOI structure devices, named as Quasi-SOI MOSFET and source-drain -on-nothing(SDON)/source-drain-on-insulator (SDOI) MOSFET, are demonstrated which can combine the advantages of SOI and bulk substrates. In the Quasi-SOI structure with the source/drain regions quasi-surrounded with insulator and the channel region directly connected with the bulk substrate, short channel effects (SCE), parasitic capacitance and self-heating effects (SHE) can be effectively reduced. The problem of degraded mobility and increased threshold voltage due to ultra-thin body in UTB SOI MOSFET's can also be solved. A method to fabricate the Quasi-SOI MOSFET is put forward. Process-device co-simulation results further show good scaling capability and excellent heat dissipation of the Quasi-SOI devices. In the SDON/SDOI device with the recessed S/D extension regions and source-drain staying on the partially buried layers, the advantages of quasi-SOI MOSFET can be maintained with the parasitic capacitance further reduced and the fabrication technology basically compatible with the standard CMOS technology. The proposed two structures can be considered as good candidates for highly-scaled devices.
机译:本文2种新颖局部-SOI结构的器件,命名为准SOI MOSFET和源极 - 漏极的-on全无(SDON)/源极 - 漏极在绝缘体上(SDOI)MOSFET中,证明其可以结合的优点的SOI和体衬底。与所述源准SOI结构/漏极区域的准包围绝缘体和与所述体衬底直接连接的沟道区,短沟道效应(SCE),寄生电容和自加热效应(SHE)能够有效地减少。降低流动性并提高阈值电压由于超薄的机身在UTB SOI MOSFET的问题也可以得到解决。制造准SOI MOSFET的方法被提出。处理装置协同仿真的结果进一步显示出良好的缩放能力和准SOI器件的优良的散热。与在部分埋层中的凹入S / d扩展区和源极 - 漏极滞留的SDON / SDOI设备,准SOI MOSFET的优点可以与寄生电容进一步减小,并且制造工艺与标准基本兼容保持CMOS技术。所提出的两种结构可以被视为好的候选人高比例的设备。

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