首页> 外文会议>International power electronics technology conference >MATCHING GATE DRIVE CIRCUITS TO FETS AND IGBTS
【24h】

MATCHING GATE DRIVE CIRCUITS TO FETS AND IGBTS

机译:将栅极驱动电路匹配到FET和IGBTS

获取原文

摘要

A variety of considerations go into the design and selection of a gate-drive circuit. For typical inductive load applications, one important factor is that the delay matching between the high and low side drivers. Better delay matching means higher performance current-loop because less deadtime is necessary. The high-side driver can be powered most conveniently by the bootstrap method for most applications. Finally, the proper values of RG depend on the desired switching speed, and on the turn-on gate threshold of the transistor.
机译:各种考虑因素进入设计和选择栅极驱动电路。对于典型的归纳负载应用,一个重要因素是高侧驱动器之间的延迟匹配。更好的延迟匹配意味着更高的性能电流循环,因为需要较少的死区时间。对于大多数应用程序,高侧驱动器可以通过引导方法最方便地供电。最后,RG的适当值取决于所需的开关速度,以及晶体管的导通栅极阈值。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号