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Teaching design-oriented VHDL

机译:教学设计导向VHDL

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摘要

The teaching of state-of-the-art design techniques (an HDL, for example) requires also the learning of a variety of CAD tools. However, though learning such tools is indispensable, it should not come at a sacrifice of fundamental principles. To attain a balance between the practices and fundamental design concepts, we have adopted a "design-oriented" approach in the teaching of VHDL at CEFET-PR. In it, the focus is partially shifted from the language itself to the designs: basic design principles are reviewed and commented, the examples are rich in details, the code is synthesized into physical devices, and simulations are always performed and examined.
机译:最先进的设计技术(例如,HDL)的教学还需要学习各种CAD工具。然而,虽然学习此类工具是必不可少的,但它不应该牺牲基本原则。为了获得实践与基本设计概念之间的平衡,我们在Cefet-Pr的VHDL教学中采用了“设计为导向的”方法。在其中,焦点部分地从语言本身转移到设计:基本的设计原则被审查和评论,这些示例详细富裕,将代码合成为物理设备,并且始终执行和检查模拟。

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