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CMP: the access to advanced low cost manufacturing

机译:CMP:访问高级低成本制造

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摘要

Summary form only given, as follows. CMP aims at providing Universities, Research Laboratories and industries with the possibility to have their integrated circuits projects fabricated for prototyping and low volume production. Presently, users are serviced for CMOS double layer poly/double layer metal (DLP/DLM) 0.8/spl mu/, DLM/TLM 0.6 /spl mu/, DLP/4LM 0.35 /spl mu/, SLP/6LM 0.25 /spl mu/, SLP/6LM 0.18 /spl mu/, BiCMOS DLP/DLM 0.8 /spl mu/, SiGe HBT 0.8 /spl mu/ DLP/DLM, SiGe HBT 0.35 /spl mu/ SLP/5LM and GaAs HEMT 0.2 /spl mu/. About 40 multi-project runs are offered per year. Micro Electro Mechanical Systems (MEMS) are also provided in standard CMP runs in CMOS DLP/DLM 0.8 /spl mu/ 0.6 /spl mu/, BiCMOS DLP/DLM 0.8 /spl mu/ and HEMT GaAs 0.2 /spl mu/, using compatible front-side bulk micro-machining. MUMPS process is offered as a surface micromachining allowing one to integrate MEMS only microstructures. Finally, the main processes for Multi-Chip Modules (MCMs) are also accessible through CMP. CMP has introduced very advanced processes during the 3 last years : 0.25 /spl mu/m CMOS in 1997, 0.18 /spl mu/m CMOS in 1999, 0.5 /spl mu/m Silicon On Sapphire in 2000, and the 0.35 /spl mu/m HBT BiCMOS in 2001. Those processes represent a challenge for CAD design, applications, and training. We will present the process and design-kits features for those advanced technologies, and give some results on the dissemination and support activity at CMP. Accessing advanced and state of the art processes gives to the academic/research community a high quality of engineering education and a high quality of research.
机译:摘要只给出,如下所述。 CMP的目的是提供大学,研究实验室和工业用有自己的集成电路项目的可能性制作原型设计和小批量生产。目前,用户提供服务,在CMOS双层多晶硅/双层金属(DLP / DLM)0.8 / SPL亩/,DLM / TLM 0.6 / SPL亩/,DLP / 4LM 0.35 / SPL亩/,SLP / 6LM 0.25 / SPL亩/,SLP / 6LM 0.18 / SPL亩/,BiCMOS工艺DLP / DLM 0.8 / SPL亩/,硅锗HBT 0.8 / SPL亩/ DLP / DLM,硅锗HBT 0.35 / SPL亩/ SLP / 5LM和GaAs HEMT 0.2 / SPL亩/ 。约40多项目正在运行,每年提供。微机电系统(MEMS),也以标准CMP提供运行在CMOS DLP / DLM 0.8 / SPL亩/ 0.6 / SPL亩/,BiCMOS工艺DLP / DLM 0.8 / SPL亩/和HEMT的GaAs 0.2 / SPL亩/,使用兼容的前侧块体微加工。流行性腮腺炎过程提供了一个表面微加工允许一个集成MEMS仅微观结构。最后,对于多芯片模块的主要过程(多芯片模块),也可通过CMP访问。 CMP已在最后3年引入非常先进的工艺:0.25 / SPL亩/米CMOS于1997年,0.18 / SPL亩/米CMOS于1999年,0.5 / SPL亩/米蓝宝石上硅在2000年,和0.35 / SPL亩/米HBT的BiCMOS在2001年这些进程表示用于CAD设计,应用程序和训练的一个挑战。我们将目前的工艺和设计工具包的功能对于那些先进的技术,并就在CMP传播和支持活动有一定的效果。访问先进和状态艺术工艺给人以学术/科研界工程教育的高质量和研究高品质。

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