Field effect transistor circuits augmented with tunnel diodes lead to decreased circuit footprints, improved operating speeds, and lower power consumption. Low power refresh-free tunneling-SRAM (TSRAM) [1] and high performance compact A/D converters [2] were realized with III-V compound semiconductors. Current advances in Si-based tunnel diodes, such as Si/SiGe resonant interband tunnel diode (RITD) structures [3], create opportunities for Si-based tunnel diode circuits. Recently, monolithically integrated TSRAM cells demonstrate the compatibility of Si/SiGe RITDs with traditional Si CMOS technology [5]. However, without SPICE compatible models it is difficult to design, characterize, and understand the functionality of complex circuits. Past models include piece-wise polynomials [5], complex arrangements of discrete device components [6], physics based models [7], and trigonometric curve fits [8,9]. These models have discontinuities, kinks in their slopes, difficult parameters to extract, unknown parameters, no closed form solutions, and poor fits to measured data. In this abstract, the authors report on a modified version of the Sze model [9] with a superior match to experimental data, for Si based Esaki tunnel diodes (ETD).
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