Vapor phase doping and sub-melt laser anneal for the fabrication of Si-based ultra-shallow junctions in sub-32 nm CMOS technology

摘要

Advances in CMOS technology require the reduction of the physical dimensions of devices as described by the International Technology Roadmap for Semiconductors. In this down-scaling process, the limits of manufacturability are being extended in order to meet the increasing demands in efficiency, reliability and accuracy. However, aiming at sub-10 nm source and drain extension junction depths, the achievement of low enough sheet resistance becomes a progressively more difficult task. Using classical beam line techniques, the junction quality can be degraded by non-trivial issues related to implantation damage when amorphizing species are used to minimize dopant channelling. In the case of non-planar devices such as finFETs, the requirement of doping conformality poses additional challenges that can not be addressed by beam line ion implantation (BII) which suffers from shadowing effect for patterns with high fin density. There is thus a strong need for novel doping strategies both for planar and non-planar devices. Vapor phase doping (VPD) [1] has already shown promising results and is a potential alternative to the classical BII. Sub-melt millisecond anneal is considered as the method of choice for dopant activation [2] whereas classical spike rapid thermal annealing (RTA) results in excessive dopant diffusion and limited electrical activation. In this work, we investigated the properties of ultra shallow junctions (USJs) fabricated by the combination of VPD and sub-melt laser annealing (LA) and compared them with those obtained by BII using similar LA conditions.