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Integrated low noise, low power, fast charge-sensitive preamplifier for avalanche photodiodes in JFET-CMOS-technology

机译:用于JFET-CMOS技术的雪崩光电二极管的集成低噪声,低功耗,快速充电敏感前置放大器

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摘要

To take advantage on the compactness of APD arrays, low noise, power efficient, fast charge sensitive preamplifier chips with differential current drivers have been developed. A 16-channel and a single channel version are available. The chips were adapted for low capacitance 4×8 APD arrays produced by Hamamatsu, Japan. A mixed JFET-CMOS production process yielded high quality integrated JFETs for the input stage of the amplifier's folded cascode. Thus, the 1/f-noise corner is kept at 4 kHz. The JFET has a transconductance of 11 mS at a drain current of 3 mA. The serial noise of the input transistor was found to be 0.8 nV/V/{the square root of}(Hz). The signal rise-time of the driver outputs is 20 ns. The rms noise of the preamplifier was found to be 480 e{sup}- with a 25 e{sup}-/pF noise slope for a shaping time of 50 ns. The serial input noise of the preamplifier is about 1.7 nV/{the square root of}(Hz) from 200 kHz up to 40 MHz and the 1/f-noise corner is at 70 kHz. The power consumption is 30 mW per preamplifier, including the differential driver. The linearity is better than 1.3% over 48 dB dynamic range. For the 16 channel chip, the gain variation is less than 3.5%. Performance similar to PMTs can be achieved with APDs in combination with this integrated preamplifier chip.
机译:要利用APD阵列的紧凑性,开发了低噪声,功率高,快速充电前置放大器具有差分电流驱动器的芯片。可以使用16通道和单通道版本。芯片适用于日本滨松生产的低电容4×8 APD阵列。混合JFET-CMOS生产过程产生了高质量的集成JFET,用于放大器折叠级联的输入级。因此,1 / F噪声角保持在4 kHz。 JFET在3 mA的漏极电流下具有11ms的跨导。输入晶体管的串行噪声被发现为0.8nV / v / {}(Hz)的平方根。驱动器输出的信号上升时间为20 ns。前置放大器的RMS噪声被发现为480 e {sup} - 具有25 e {sup} - / pf噪声斜率,用于成形时间为50 ns。前置放大器的串行输入噪声大约为40 kHz的1.7 nV / {}(Hz)的平方根,高达40 MHz,1 / F噪声角位于70 kHz。每个前置放大器的功耗为30 MW,包括差动驱动器。线性度超过48 dB动态范围的1.3%。对于16个通道芯片,增益变化小于3.5%。可以通过APDS与该集成前置放大器芯片组合使用与PMT类似的性能。

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