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Selective Deposition of C-axis Oriented Pb_5Ge_3O_(11) on the Patterned High k Gate Oxide by MOCVD Processes

机译:通过MOCVD工艺在图案化的高k型氧化物上选择性沉积C轴取向的PB_5GE_3O_(11)

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For the high density FeRAM applications, the integration process-induces damages such as etching damage that degrades the properties of FRAM devices and the high surface roughness of ferroelectric thin film that results in the difficulty for alignment are critical issues. In order to solve these problems, selective deposition process is developed to simplify the integration processes and improve the properties of FeRAM memory devices. Based on the differential deposition rates of ferroelectric materials on high-k oxide and silicon dioxide, we can selectively deposit a c-axis oriented PGO thin film on the patterned high-k oxide such as ZrO_x (x=0-2), HfO_x (x=0-2), TiO_2, and their mixtures other than on SiO_2. By patterning the high-k dielectric, the PGO deposition is limited to just the preferred pattern high-k area. SEM, EDX and x-ray measurements further confirm that the c-axis oriented PGO thin films are selectively deposited on the high-k gate oxide other than on the field SiO_2 including alignment mark area, which will eliminate the roughness problem for the alignments. Also the etching damage is eliminated since there is no need to etch the PGO film, which improved the properties of FeRAM devices.
机译:对于高密度的Feram应用,整合过程 - 引起诸如蚀刻损伤的损坏,从而降低FRAM器件的性质和铁电薄膜的高表面粗糙度,导致对准的难度是关键问题。为了解决这些问题,开发了选择性沉积过程以简化积分过程并改善FERAM存储器件的特性。基于铁电材料对高k氧化物和二氧化硅的差分沉积速率,我们可以在图案化的高k氧化物上选择性地沉积C轴取向的PGO薄膜,例如ZrO_x(x = 0-2),hfo_x( x = 0-2),TiO_2,以及除SIO_2之外的混合物。通过图案化高k电介质,PGO沉积仅限于优选的图案高k区域。 SEM,EDX和X射线测量进一步证实C轴取向的PGO薄膜在除了包括对准标记区域的场SiO_2上的高k栅极氧化物上选择性地沉积在高k栅极氧化物上,这将消除对准的粗糙度问题。此外,由于不需要蚀刻PGO膜,因此消除了蚀刻损坏,这改善了Feram器件的性质。

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