首页> 外文会议>International Conference on Algorithms and Complexity >On the Complexity of Wafer-to-Wafer Integration
【24h】

On the Complexity of Wafer-to-Wafer Integration

机译:论晶圆到晶圆集成的复杂性

获取原文

摘要

In this paper we consider the Wafer-to-Wafer Integration problem. A wafer is a p-dimensional binary vector. The input of this problem is described by m disjoints sets (called "lots"), where each set contains n wafers. The output of the problem is a set of n disjoint stacks, where a stack is a set of m wafers (one wafer from each lot). To each stack we associate a p-dimensional binary vector corresponding to the bit-wise AND operation of the wafers of the stack. The objective is to maximize the total number of "1" in the n stacks. We provide O(m~(1-∈)) and O(p~(1-∈)) non-approximability results even for n = 2, as well as a p/r-approximation algorithm for any constant r. Finally, we show that the problem is FPTwhen parameterized by p, and we use this FPTalgorithm to improve the running time of the p/r-approximation algorithm.
机译:在本文中,我们考虑晶圆到晶圆集成问题。晶片是p维二进制矢量。该问题的输入由M个不相位集(称为“LOTS”)描述,其中每个集合包含n个晶片。问题的输出是一组N个不相交的堆栈,其中堆栈是一组M晶片(来自每个批次的一个晶片)。对于每个堆栈,我们将对应于堆栈的晶片的比特和操作对应的p维二进制向量。目标是最大化N堆叠中的“1”的总数。我们提供O(m〜(1-∈))和o(p〜(1-ν))即使是n = 2,以及任何常数r的p / r型近似算法也是如此。最后,我们展示了问题是由P参数化的FPT,我们使用该FPTalGorithm来改善P / R近似算法的运行时间。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号