A LOW-POWER EFFICIENT DIRECT DIGITAL FREQUENCY SYNTHESIZER BASED ON NEW TWO-LEVEL LOOKUP TABLE

摘要

This work presents a low power direct digital frequencysynthesizer (DDFS) by using a new two-level lookup table algorithm. The algorithm uses trigonometric double angle formula to divide ROM lookup table into two parts. The ROM size of the proposed architecture is 25percent less than that of conventional two-level table. The hardware complexity of the new DDFS architecture compared to the traditional two-level table DDFS can be omitted one multiplier. A synthesized 0.35-(mu)m DDFS with a SFDR of -80dB, runs up to 100MHz and consumes 81-mW at 3.0v. The power efficiency is 0.81-mW/MHz, which represents an enhancement of more than 38percent compared to the conventional DDFS.