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Low-power direct digital frequency synthesizer architecture

机译:低功耗直接数字频率合成器架构

摘要

A direct digital frequency synthesizer for generating a digital sine or cosine function waveform receive digital input. Memory stores digital samples along portions of sine and cosine function waveforms. The memory outputs the digital samples in response to a first portion of the digital input. Control logic is responsive to the digital input and controls the output of the digital samples from the memory to allow digital samples along a complete cycle of the sine or cosine function waveform to be output even though only portions of the sine and cosine function waveforms are stored in the memory. A linear interpolator receives a second portion of the digital input and modifies digital samples output by the memory to generate intermediate digital samples between the digital samples stored in the memory to improve accuracy.
机译:用于生成数字正弦或余弦函数波形的直接数字频率合成器接收数字输入。存储器沿正弦和余弦函数波形的一部分存储数字样本。存储器响应于数字输入的第一部分而输出数字样本。控制逻辑对数字输入作出响应,并控制来自存储器的数字样本的输出,即使仅存储了部分正弦和余弦函数波形,也允许沿整个正弦或余弦函数波形周期输出数字样本在内存中。线性内插器接收数字输入的第二部分,并修改存储器输出的数字样本,以在存储在存储器中的数字样本之间生成中间数字样本,以提高准确性。

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