A 0.65V, 2.4GHZ CMOS LOW-NOISE AMPLIFIERS DESIGN WITH NOISE OPTIMIZATION

摘要

A 0.65 V, 2.4 GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18μm CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 27 dB, a noise figure of only 1.1 dB, power dissipation of 4.6 mW from a 0.65 V power supply.