Nitride engineering for improved erase performance and retention of TANOS NAND Flash memory

摘要

TANOS charge trap Flash (CTF) with Al{sub}2O{sub}3-Si{sub}3N{sub}4-SiO{sub}2 memory stack and TaN metal gate is a candidate technology to replace conventional floating gate technology for multilevel NAND applications beyond the 32nm node. The main drawbacks of TANOS to date are poor erase performance (in terms of speed and/or saturated level) as well as insufficient retention in the highest programmed state [1].