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Integer and Floating-Point Constant Multipliers for FPGAs

机译:用于FPGA的整数和浮点常数乘法器

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摘要

Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point hardware operators not available in microprocessors. Multiplication by a constant is an important example of such an operator. This article presents an architecture generator for the correctly rounded multiplication of a floating-point number by a constant. This constant can be a floating-point value, but also an arbitrary irrational number. The multiplication of the significands is an instance of the well-studied problem of constant integer multiplication, for which improvement to existing algorithms are also proposed and evaluated.
机译:可重构电路现在具有允许它们用作浮点加速器的容量。它们提供巨大的并行性,也有机会设计无线电处理器中不可用的优化浮点硬件运营商。乘法常量是这种操作员的重要示例。本文介绍了一个架构生成器,用于通过常量正确舍入的浮点数乘法。这种常数可以是浮点值,而且可以是任意的非理性数量。有效和乘法的乘法是恒定整数乘法的良好问题的实例,还提出并评估了对现有算法的改进。

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